1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device in the field of so-called LSI's (large-scale integrated circuits) inclusive of very large-scale integrated circuits and extra super large-scale integrated circuits, in particular those in which the trench-isolation technique is utilized.
The method for manufacturing an integrated circuit according to the present invention is characterized in that gate electrodes are formed by etching a polysilicon film deposited on the whole surface of a substrate without leaving, on the stepped portions of the silicon oxide film on a field oxide film, any etching residue that causes dust and thereby preventing reduction of yield and deterioration of the quality of the resulting devices and substantially reducing the cost for manufacturing semiconductor devices.
2. Description of the Related Art
In the conventional analog-digital hybrid LSI, in particular MOS LSI, the analog part has been separated from the digital part through the isolation method using trenches to prevent mixing of noises in the analog part and further the analog part and digital part can be completely separated if the trench isolation method is adopted in combination with a semiconductor substrate on a dielectric such as silicon-on-insulator (SOI).
In this case, polysilicon having good covering properties (coverage) is currently used as a material to be embedded in the trench. However, the polysilicon is in general used after subjecting it to an oxidation treatment to thus prevent the formation of a short-circuit between the polysilicon film in the trench and a wiring layer, since it also serves as a semiconductor.
However, it is liable to cause crystalline defects within the semiconductor layer due to a stress applied thereto during the oxidation treatment. As measures to prevent the occurrence of such crystalline defects, there has been adopted, for instance, a method that comprises forming a silicon oxide film on a polysilicon film according to a vapor growth method such as vapor phase epitaxy (VPE) or a chemical vapor deposition (CVD) method instead of oxidizing the polysilicon film, or a method in which the polysilicon film is formed not only in the trench, but also over the upper portion thereof in the form of a pad and only the superficial portion of the polysilicon film is oxidized under conditions such that the polysilicon within the trench is not oxidized. Thus, the spread of the stress even to the semiconductor layer and hence the occurrence of the crystalline defects within the semiconductor layer during the oxidation treatment have been prevented.
There has also been adopted, as a measure to prevent the occurrence of crystalline defects, a method in which an oxidized polysilicon layer in the form of a pad is utilized as a contact between the oxidized layer and a wiring layer so that an electric voltage can be applied thereto, since the polysilicon film within the trench also serves as an electrode to thus deteriorate the quality of the elements.
In conventional methods for producing LSI's such as the foregoing method which comprises forming a polysilicon film in and over a trench in the form of a pad or a mushroom-shape cross section and then oxidizing only the superficial portion thereof or the method in which an oxidized polysilicon layer in the form of a pad is utilized as a contact between the oxidized layer and a wiring layer so that an electric voltage can be applied thereto, a gate electrode is formed by depositing a polysilicon film on the entire surface of a substrate and dry-etching the film, but part of the polysilicon film as a material for the gate remains, as an etching residue, on the stepped portion of a silicon oxide layer formed by oxidizing the polysilicon film on a field oxide film; the etching residue comprising the polysilicon is lifted off in the subsequent process and serves as dust and causes reduction of yield and deterioration of the quality of the resulting semiconductor device. In this respect, the dry etching is adopted because it is particularly effective for forming fine gate electrode patterns.
Such a problem of the formation of an etching residue serving as a dust likewise arises in cases wherein a silicon oxide film is formed on a polysilicon film through the CVD method.
This problem has conventionally been solved by etching the stepped portions carrying the etching residue comprising polysilicon with an isotropic etchant through a resist mask having openings corresponding to the stepped portions to thus remove the etching residue.
However, this conventional manufacturing method requires the use of one additional resist mask which leads to an increase in the cost of manufacturing semiconductor devices.